There are numerous applications for transistor devices in semiconductor constructions. For instance, transistor devices can be incorporated into memory array constructions, as well as into logic constructions.
A typical transistor device will comprise a transistor gate over El semiconductor substrate. The transistor gate will comprise a conductive material, such as, for example, conductively doped polysilicon, and can further comprise metal silicide and/or metal over the conductively doped silicon. The transistor gate will be separated from the semiconductive material substrate by a thin layer of dielectric material. The dielectric material can comprise, for example, silicon dioxide (a so-called gate oxide). Alternatively, the dielectric material can comprise a combination of silicon dioxide and a nitrogen-containing layer formed over the silicon dioxide. The nitrogen-containing layer can be provided to alleviate or prevent dopant diffusion from the conductively-doped silicon of the transistor gate to the underlying semiconductive material substrate, such as, for example, to prevent diffusion of boron.
One exemplary method of forming the nitrogen-containing layer of the dielectric material is to expose an underlying silicon dioxide material to activated nitrogen. The activated nitrogen can be formed by exposing a nitrogen precursor (such as, for example, N2) to a plasma generated at a power which is less than 1,500 watts, for a processing time of no greater than 20 seconds. The relatively low power and processing time duration are utilized because such are found to be sufficient for forming a suitable nitrogen-comprising layer for utilization as a dopant-migration barrier. Accordingly, it would be a waste of energy and processing time to extend the power and the duration of the nitrogen treatment.
In addition to the gate and dielectric layer discussed above, a transistor device will comprise a channel region within the semiconductor substrate under the transistor gate, and a pair of source/drain regions separated from one another by the channel region. The source/drain regions are selectively electrically connectable through the gate of the transistor device.
Transistor devices can be divided amongst two broad categories. One type of device comprises n-type conductively doped source/drain regions and is referred to as an NMOS device (with NMOS being an abbreviation for n-type metal-oxide-silicon), and the other type of device comprises p-type conductively doped source/drain regions and is referred to as a PMOS device (with PMOS standing for p-type metal-oxide-silicon). Logic circuitry can comprise combinations of NMOS and PMOS devices in so-called CMOS arrangements.
Among the difficulties in forming various transistors, and particularly in forming deep sub-micron PMOS transistors, is that the channel region must generally be doped with a threshold voltage (Vt) adjustment implant, to a concentration greater than 7×1017 atoms/cm3 to achieve a reasonable Vt value. It would be desirable to lower the Vt implant concentration, as lower dopant concentrations in a PMOS channel can lead to higher drive currents for the channel, higher mobility within the channel, and lower source and drain junction capacitance. Further, the lower junction capacitance can result in lower source and drain junction leakage within a device.